Skip to main content Skip to main navigation

Publications

Page 2 of 4.

  1. Sallar Ahmadi-Pour; Sangeet Saha; Vladimir Herdt; Rolf Drechsler; Klaus McDonald-Maier

    Task Mapping and Scheduling in FPGA-based Heterogeneous Real-time Systems: A RISC-V Case-Study

    In: Euromicro Conference on Digital System Design (DSD). Euromicro Conference on Digital System Design (DSD), August 31 - September 2, Gran Canaria, …

  2. Alexander Fratzer; Vladimir Herdt; Christoph Lüth; Rolf Drechsler

    Virtual Prototype based Analysis of Neural Network Cache Behavior for Tiny Edge Device

    In: Forum on Specification & Design Languages (FDL). Forum on Specification & Design Languages (FDL-2022), September 14-16, Linz, Austria, 2022.

  3. Niklas Bruns; Vladimir Herdt; Rolf Drechsler

    Unified HW/SW Coverage: A Novel Metric to Boost Coverage-guided Fuzzing for Virtual Prototype based HW/SW Co-Verification

    In: Forum on Specification & Design Languages (FDL). Forum on Specification & Design Languages (FDL-2022), September 14-16, Linz, Austria, 2022.

  4. Jan Zielasko; Sören Tempel; Vladimir Herdt; Rolf Drechsler

    3D Visualization of Symbolic Execution Traces

    In: Forum on Specification & Design Languages (FDL). Forum on Specification & Design Languages (FDL-2022), September 14-16, Linz, Austria, 2022.

  5. Sören Tempel; Vladimir Herdt; Rolf Drechsler

    SISL: Concolic Testing of Structured Binary Input Formats via Partial Specification

    In: Automated Technology for Verification and Analysis (ATVA). International Symposium on Automated Technology for Verification and Analysis …

  6. Christopher Metz; Mehran Goli; Rolf Drechsler

    Towards Neural Hardware Search: Power Estimation of CNNs for GPGPUs with Dynamic Frequency Scaling

    In: ACM/IEEE Workshop on Machine Learning for CAD (MLCAD). ACM/IEEE Workshop on Machine Learning for CAD (MLCAD-2022), September 12-13, Snowbird, USA, …

  7. Mehran Goli; Rolf Drechsler

    ATLaS: Automatic Detection of Timing-based Information Leakage Flows for SystemC HLS Designs

    In: 26th Asia and South Pacific Design Automation Conference (ASP-DAC). Asia and South Pacific Design Automation Conference (ASP-DAC-2021), January …

  8. Vladimir Herdt; Sören Tempel; Daniel Große; Rolf Drechsler

    Mutation-based Compliance Testing for RISC-V

    In: 26th Asia and South Pacific Design Automation Conference (ASP-DAC). Asia and South Pacific Design Automation Conference (ASP-DAC-2021), January …

  9. Sören Tempel; Vladimir Herdt; Rolf Drechsler

    An Effective Methodology for Integrating Concolic Testing with SystemC-based Virtual Prototypes

    In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2021), February 1-5, Grenoble, France, 2021.

  10. Sallar Ahmadi-Pour; Vladimir Herdt; Rolf Drechsler

    MicroRV32: A SpinalHDL based RISC-V Implementation for FPGAs

    In: University Booth at Design, Automation and Test in Europe (DATE). University Booth at Design, Automation and Test in Europe (DATE) (University …