Embedded Intelligence

Page 7 of 8.

1. Vladimir Herdt; Hoang M. Le; Daniel Große; Rolf Drechsler

   Combining Sequentialization-based Verification of Multi-Threaded C Programs with Symbolic Partial Order Reduction

   In: International Journal on Software Tools for Technology Transfer (STTT), 2019.

2. Vladimir Herdt; Daniel Große; Hoang M. Le; Rolf Drechsler

   Early Concolic Testing of Embedded Binaries with Virtual Prototypes: A RISC-V Case Study

   In: Design Automation Conference (DAC). Design Automation Conference (DAC-2019), June 2-6, Las Vegas, Nevada, USA, 2019.

3. Tim Meywerk; Marcel Walter; Vladimir Herdt; Daniel Große; Rolf Drechsler

   Towards Formal Verification of Plans for Cognition-enabled Autonomous Robotic Agents

   In: EUROMICRO Digital System Design Conference (DSD). Euromicro Conference on Digital System Design (DSD-2019), August 28-30, Kallithea, Chalkidiki, …

4. Vladimir Herdt; Daniel Große; Rolf Drechsler; Christoph Gerum; Alexander Jung; Joscha-Joel Benz; Oliver Bringmann; Michael Schwarz; Dominik Stoffel; Wolfgang Kunz

   Systematic RISC-V based Firmware Design

   In: Forum on Specification & Design Languages (FDL). Forum on Specification & Design Languages (FDL-2019), September 2-4, Southampton, United Kingdom, …

5. Vladimir Herdt; Daniel Große; Hoang M. Le; Rolf Drechsler

   Extensible and Configurable RISC-V based Virtual Prototype

   In: Forum on specification & Design Languages (FDL). Forum on Specification & Design Languages (FDL-2018), September 10-12, München, Germany, 2018.

6. Muhammad Hassan; Vladimir Herdt; Hoang M. Le; Mingsong Chen; Daniel Große; Rolf Drechsler

   Data Flow Testing for Virtual Prototypes

   In: Design, Automation and Test in Europe (DATE). Design, Automation & Test in Europe (DATE-2017), March 27-31, Lausanne, Switzerland, 2017.

7. Hoang M. Le; Vladimir Herdt; Daniel Große; Rolf Drechsler

   Towards Formal Verification of Real-World SystemC TLM Peripheral Models - A Case Study

   In: Design, Automation and Test in Europe (DATE). Design, Automation & Test in Europe (DATE), March 14-18, Dresden, Germany, Pages 1160-1163, 2016.

8. Vladimir Herdt; Hoang M. Le; Daniel Große; Rolf Drechsler

   ParCoSS: Efficient Parallelized Compiled Symbolic Simulation

   In: International Conference on Computer Aided Verification (CAV). International Conference on Computer Aided Verification (CAV-28), July 17-23, …

9. Vladimir Herdt; Hoang M. Le; Daniel Große; Rolf Drechsler

   Compiled Symbolic Simulation for SystemC

   In: 35th International Conference On Computer Aided Design. IEEE/ACM International Conference on Computer-Aided Design (ICCAD-35), November 7-10, …

10. Vladimir Herdt; Hoang M. Le; Daniel Große; Rolf Drechsler

    On the Application of Formal Fault Localization to Automated RTL-to-TLM Fault Correspondence Analysis for Fast and Accurate VP-based Error Effect Simulation - A Case Study

    In: Forum on specification & Design Languages. Forum on Specification & Design Languages (FDL), September 14-16, Bremen, Germany, 2016.

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