Embedded Intelligence

Page 8 of 8.

1. Vladimir Herdt; Hoang M. Le; Rolf Drechsler

   Verifying SystemC using Stateful Symbolic Simulation

   In: Design Automation Conference (DAC). Design Automation Conference (DAC), June 7-11, San Francisco, USA, 2015.

2. Vladimir Herdt; Hoang M. Le; Daniel Große; Rolf Drechsler

   Lazy-CSeq-SP: Boosting Sequentialization-based Verification of Multi-Threaded C Programs via Symbolic Pruning of Redundant Schedules

   In: Proceedings of ATVA 2015. International Symposium on Automated Technology for Verification and Analysis (ATVA-2015), October 12-15, Shanghai, …

3. Hoang M. Le; Daniel Große; Rolf Drechsler; Vladimir Herdt

   Verifying SystemC using an Intermediate Verification Language and Symbolic Simulation

   In: Design Automation Conference. Design Automation Conference (DAC-13), June 2-6, Austin, TX, USA, IEEE, 2013.

4. Hoang m. Le; Daniel Große; Vladimir Herdt; Rolf Drechsler

   SystemC Verifikation mittels symbolischer Simulation einer Zwischensprache

   In: Electronic Design Automation Workshop. Electronic Design Automation Workshop (edaWorkshop-13), May 14-16, Dresden, Germany, VDE, 2013.

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