Robotics Innovation Center

Publications

Page 10 of 10.

Amr Sayed Ahmed; Daniel Große; Mathias Soeken; Rolf Drechsler
Equivalence Checking Using Gröbner Bases
In: Formal Methods in Computer-Aided Design. Formal Methods in Computer-Aided Design (FMCAD-2016), October 3-6, Mountain View, USA, 2016.
Vladimir Herdt; Hoang M. Le; Daniel Große; Rolf Drechsler
On the Application of Formal Fault Localization to Automated RTL-to-TLM Fault Correspondence Analysis for Fast and Accurate VP-based Error Effect Simulation - A Case Study
In: Forum on specification & Design Languages. Forum on Specification & Design Languages (FDL), September 14-16, Bremen, Germany, 2016.
Daniel Große; Hoang M. Le; Muhammad Hassan; Rolf Drechsler
Guided Lightweight Software Test Qualiﬁcation for IP Integration using Virtual Prototypes
In: The 34th IEEE International Conference on Computer Design. IEEE International Conference on Computer Design (ICCD-34), October 3-5, Phoenix, USA, …
Daniel Große; Kenneth Schmitz; Rolf Drechsler
Using Lightweight Containers in Hardware/Software Co-Design for Security
In: 2016 Workshop on Computer-Aided Design and Implementation for Cryptography and Security. Workshop on Computer-Aided Design and Implementation for …
Fan Gu; Xinqian Zhang; Mingsong Chen; Daniel Große; Rolf Drechsler
Quantitative Timing Analysis of UML Activity Diagrams Using Statistical Model Checking
In: Design, Automation and Test in Europe (DATE). Design, Automation & Test in Europe (DATE-2016), March 14-18, Dresden, Germany, Pages 780-785, 2016.
Aljoscha Windhorst; Hoang M. Le; Daniel Große; Rolf Drechsler
Towards Generating Test Suites with High Functional Coverage for Error Effect Simulation
In: 1st International ESWEEK Workshop on Resiliency in Embedded Electronic Systems. International ESWEEK Workshop on Resiliency in Embedded Electronic …
Vladimir Herdt; Hoang M. Le; Daniel Große; Rolf Drechsler
Lazy-CSeq-SP: Boosting Sequentialization-based Verification of Multi-Threaded C Programs via Symbolic Pruning of Redundant Schedules
In: Proceedings of ATVA 2015. International Symposium on Automated Technology for Verification and Analysis (ATVA-2015), October 12-15, Shanghai, …
Hoang M. Le; Daniel Große; Rolf Drechsler; Vladimir Herdt
Verifying SystemC using an Intermediate Verification Language and Symbolic Simulation
In: Design Automation Conference. Design Automation Conference (DAC-13), June 2-6, Austin, TX, USA, IEEE, 2013.
Hoang m. Le; Daniel Große; Vladimir Herdt; Rolf Drechsler
SystemC Verifikation mittels symbolischer Simulation einer Zwischensprache
In: Electronic Design Automation Workshop. Electronic Design Automation Workshop (edaWorkshop-13), May 14-16, Dresden, Germany, VDE, 2013.

Links

Robotics Innovation Center

Equivalence Checking Using Gröbner Bases

On the Application of Formal Fault Localization to Automated RTL-to-TLM Fault Correspondence Analysis for Fast and Accurate VP-based Error Effect Simulation - A Case Study

Guided Lightweight Software Test Qualiﬁcation for IP Integration using Virtual Prototypes

Using Lightweight Containers in Hardware/Software Co-Design for Security

Quantitative Timing Analysis of UML Activity Diagrams Using Statistical Model Checking

Towards Generating Test Suites with High Functional Coverage for Error Effect Simulation

Lazy-CSeq-SP: Boosting Sequentialization-based Verification of Multi-Threaded C Programs via Symbolic Pruning of Redundant Schedules

Verifying SystemC using an Intermediate Verification Language and Symbolic Simulation

SystemC Verifikation mittels symbolischer Simulation einer Zwischensprache

Links

Contact

Main site in Bremen