Publication
RIVER: Sneak Path Aware READ-based In-Memory Computing for 1T1M Memristive Crossbars
Till Schnittka; Chandan Jha; Sallar Ahmadi-Pour; Rolf Drechsler
In: 28th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS). IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS-2025), May 5-7, Lyon, France, 2025.
Abstract
In-memory Computing (IMC) using emerging devices
has shown immense potential. Among these devices, memristors
have emerged as one of the most popular for performing digital
IMC. While several methods exist for digital IMC using memristors, most require expensive write operations in terms of energy,
latency, and endurance. Hence, READ-based IMC techniques have
been proposed to reduce the number of writes to the memristor
crossbar. However, existing techniques rely on simple gates that can
be mapped to the memristive crossbar, making them non-optimal,
and they suffer from unwanted sneak paths causing undesired
behavior. In this work, we alleviate these limitations and propose
an optimized synthesis methodology for 1T1M crossbars called
RIVER. RIVER supports more complex gates and is sneak-path
aware. When comparing RIVER with the state-of-the-art using
ISCAS’ 85 and EPFL benchmarks, we achieve 33% less gate
utilization on average while reducing the average staircase length by
37%. Moreover, these enhancements result in a 58% reduction in
the required crossbar area. After eliminating sneak paths, RIVER
still shows 38% l