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Publication

TinyIceNet: Low-Power SAR Sea Ice Segmentation for On-Board FPGA Inference

Mhd Rashed Al Koutayni; Mohamed Selim; Gerd Reis; Alain Pagani; Didier Stricker
In: Proceedings of the 2026 Computer Vision Conference (CVC). Computer Vision Conference (CVC-2026), May 21-22, Amsterdam, Netherlands, Springer, 2026.

Abstract

Accurate sea ice mapping is essential for safe maritime navigation in polar regions, where rapidly changing ice conditions require timely and reliable information. While Sentinel-1 Synthetic Aperture Radar (SAR) provides high- resolution, all-weather observations of sea ice, conventional ground-based pro- cessing is limited by downlink bandwidth, latency, and energy costs associated with transmitting large volumes of raw data. On-board processing, enabled by dedicated inference chips integrated directly within the satellite payload, offers a transformative alternative by generating actionable sea ice products in orbit. In this context, we present TinyIceNet, a compact semantic segmentation net- work co-designed for on-board Stage of Development (SOD) mapping from dual- polarized Sentinel-1 SAR imagery under strict hardware and power constraints. Trained on the AI4Arctic dataset, TinyIceNet combines SAR-aware architec- tural simplifications with low-precision quantization to balance accuracy and efficiency. The model is synthesized using High-Level Synthesis and deployed on a Xilinx Zynq UltraScale+ FPGA platform, demonstrating near-real-time in- ference with significantly reduced energy consumption. Experimental results show that TinyIceNet achieves 75.216% F1 score on SOD segmentation while reducing energy consumption by 2× compared to full-precision GPU baselines, underscoring the potential of chip-level hardware–algorithm co-design for fu- ture spaceborne and edge AI systems.

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