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Publications

Page 5 of 60.

  1. SAT can Ensure Polynomial Bounds for the Verification of Circuits with Limited Cutwidth

    In: 16th International Workshop on Boolean Problems (IWSBP). International Workshop on Boolean Problems (IWSBP-2024), September 19-20, Bremen, …

  2. Bernhard J. Berger; Christina Plump; Rolf Drechsler

    Why less is sometimes more -- Using Boolean literals to solve 2048

    In: 16th International Workshop on Boolean Problems (IWSBP). International Workshop on Boolean Problems (IWSBP-2024), September 19-20, Bremen, …

  3. Sören Tempel; Tobias Brandt; Christoph Lüth; Rolf Drechsler

    Symbolic Execution of Binary Code based on Formal ISA Semantics

    In: 4th International KLEE Workshop on Symbolic Execution. KLEE Workshop on Symbolic Execution, April 14-16, Lisbon, Portugal, 2024.

  4. Special issue on in-memory computing: Circuits, system, architecture and verification

    In: Memories - Materials, Devices, Circuits and Systems, Vol. 5, Pages 1-3, Science Direct, 10/2023.

  5. Rune Krauss; Mehran Goli; Rolf Drechsler

    EDDY: A Multi-Core BDD Package With Dynamic Memory Management and Reduced Fragmentation

    In: Proceedings of the 28th Asia and South Pacific Design Automation Conference (ASP-DAC). Asia and South Pacific Design Automation Conference …

  6. Automated Equivalence Checking Method for Majority based In-Memory Computing on ReRAM Crossbars

    In: Proceedings of the 28th Asia and South Pacific Design Automation Conference (ASP-DAC). Asia and South Pacific Design Automation Conference …

  7. Jan Kleinekathöfer; Alireza Mahzoon; Rolf Drechsler

    Polynomial Formal Verification of Floating Point Adders

    In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2023), April 17-19, Antwerp, Belgium, 2023.

  8. Niklas Bruns; Vladimir Herdt; Rolf Drechsler

    Processor Verification using Symbolic Execution: A RISC-V Case-Study

    In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2023), April 17-19, Antwerp, Belgium, 2023.

  9. Kemal Çağlar Coşkun; Muhammad Hassan; Rolf Drechsler

    Equivalence Checking of System-Level and SPICE-Level Models of Static Nonlinear Circuits

    In: Design, Automation and Test in Europe (DATE). Design, Automation & Test in Europe (DATE-2023), April 17-19, Antwerp, Belgium, 2023.

  10. Sajjad Parvin; Mehran Goli; Frank Sill Torres; Rolf Drechsler

    FELOPi: A Framework for Simulation and Evaluation of Post-Layout File Against Optical Probing

    In: Design, Automation and Test in Europe (DATE). Design, Automation & Test in Europe (DATE-2023), April 17-19, Antwerp, Belgium, 2023.