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Publikationen

Seite 1 von 2.

  1. Security Coverage Metrics for Information Flow at the System Level

    In: 29th Asia and South Pacific Design Automation Conference (ASP-DAC). Asia and South Pacific Design Automation Conference (ASP-DAC-2024), January …

  2. Towards Completeness: Security Coverage for System Level IFT

    In: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV). ITG/GMM/GI-Workshop "Methoden und …

  3. Towards ML-based Performance Estimation of Embedded Software: A RISC-V Case Study

    In: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV). ITG/GMM/GI-Workshop "Methoden und …

  4. Muhammad Hassan; Sallar Ahmadi-Pour; Khushboo Qayyum; Chandan Kumar Jha; Rolf Drechsler

    LLM-guided Formal Verification Coupled with Mutation Testing

    In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2024), March 25-27, Valencia, Spain, 2024.

  5. Jan Zielasko; Rune Krauss; Marcel Merten; Rolf Drechsler

    Improving Virtual Prototype Driven Hardware Optimization by Merging Instruction Sequences

    In: 27th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS). IEEE International Symposium on Design and …

  6. Kemal Çağlar Coşkun; Muhammad Hassan; Lars Hedrich; Rolf Drechsler

    Efficient Equivalence Checking of Nonlinear Analog Circuits using Gradient Ascent

    In: 61st Design Automation Conference (DAC). Design Automation Conference (DAC), June 23-27, San Francisco, USA, 2024.

  7. Niklas Bruns; Vladimir Herdt; Rolf Drechsler

    Processor Verification using Symbolic Execution: A RISC-V Case-Study

    In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2023), April 17-19, Antwerp, Belgium, 2023.

  8. Sören Tempel; Tobias Brandt; Christoph Lüth

    Versatile and Flexible Modelling of the RISC-V Instruction Set Architecture

    In: 24th International Symposium on Trends in Functional Programming (TFP). International Symposium on Trends in Functional Programming (TFP-2023), …

  9. Sören Tempel; Tobias Brandt; Christoph Lüth; Rolf Drechsler

    Minimally Invasive Generation of RISC-V Instruction Set Simulators from Formal ISA Models

    In: Forum on specification & Design Languages (FDL). Forum on Specification & Design Languages (FDL-2023), September 13-15, Turin, Italy, 2023.