Publikationen

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Chandan Kumar Jha; Khushboo Qayyum; Muhammad Hassan; Rolf Drechsler
FARAD: Automated Formal Verification of Approximate Restoring Array Dividers
In: 38th International Conference on VLSI Design. International Conference on VLSI Design (VLSID-2025), 38th, January 4-8, Bangalore, India, 2025.
Chandan Jha; Muhammad Hassan; Khushboo Qayyum; Sallar Ahmadi-Pour; Ruidi Qiu Kangwei Xu; Jason Blocklove; Luca Collini; Andre Nakkab; Ulf Schlichtmann; Yalin Zhang; Ramesh Karri; Bing Li; Siddharth Garg; Rolf Drechsler
Large Language Models (LLMs) for Verification, Testing, and Design
In: 30th IEEE European Test Symposium. IEEE European Test Symposium (ETS-2025), May 26-30, Tallinn, Estonia, IEEE, 2025.
Muhammad Hassan; Sallar Ahmadi-Pour; Khushboo Qayyum; Chandan Kumar Jha; Rolf Drechsler
LLM-guided Formal Verification Coupled with Mutation Testing
In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2024), March 25-27, Valencia, Spain, 2024.
Khushboo Qayyum; Sallar Ahmadi-Pour; Muhammad Hassan; Chandan Kumar Jha; Rolf Drechsler
LLM-Assisted High Quality Invariants Generation for Formal Verification
In: Design, Automation & Test in Europe (DATE). Design, Automation & Test in Europe (DATE-2024), March 25-27, Valencia, Spain, 2024.
Khushboo Qayyum; Abhoy Kole; Kamalika Datta; Muhammad Hassan; Rolf Drechsler
Exploring the Potential of Decision Diagrams for Efficient In-Memory Design Verification
In: 34th Great Lakes Symposium on VLSI (GLSVLSI). ACM Great Lakes Symposium on VLSI (GLSVLSI-2024), June 12-14, Tampa Bay Area, USA, o.A, 2024.
Khushboo Qayyum; Muhammad Hassan; Sallar Ahmadi-Pour; Chandan Kumar Jha; Rolf Drechsler
Late Breaking Results: LLM-assisted Automated Incremental Proof Generation for Hardware Verification
In: 61st Design Automation Conference (DAC). Design Automation Conference (DAC-2024), June 23-27, San Francisco, USA, 2024.
Khushboo Qayyum; Muhammad Hassan; Sallar Ahmadi-Pour; Chandan Jha; Rolf Drechsler
From Bugs to Fixes: HDL Bug Identification and Patching using LLMs and RAG
In: Proceedings of the First IEEE International Workshop on LLM-Aided Design (LAD'24). IEEE International Workshop on LLM-Aided Design (LAD-24), June 28-29, San Jose, USA, 2024.
Chandan Jha; Khushboo Qayyum; Kemal Çaglar Coskun; Simranjeet Singh; Muhammad Hassan; Rainer Leupers; Farhad Merchant; Rolf Drechsler
veriSIMPLER : An Automated Formal Verification Methodology for SIMPLER MAGIC Design Style Based In-Memory Computing
In: IEEE Transactions on Circuits and Systems I: Regular Papers, IEEE, 2024.
Chandan Kumar Jha; Khushboo Qayyum; Muhammad Hassan; Rolf Drechsler
Extend and Reduce Methodology to Enable Formal Verification of Truncated Adders
In: 16th International Workshop on Boolean Problems (IWSBP). International Workshop on Boolean Problems (IWSBP-2024), September 19-20, Bremen, Germany, 2024.
Chandan Kumar Jha; Khushboo Qayyum; Muhammad Hassan; Rolf Drechsler
Extend and Reduce Methodology to Enable Formal Verification of Truncated Adders
In: IT - information technology (IT), Degruyter, 2024.