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Publikationen

Seite 1 von 4.

  1. Niklas Bruns; Vladimir Herdt; Rolf Drechsler

    Processor Verification using Symbolic Execution: A RISC-V Case-Study

    In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2023), April 17-19, Antwerp, Belgium, 2023.

  2. Sören Tempel; Vladimir Herdt; Rolf Drechsler

    Automated Detection of Spatial Memory Safety Violations for Constrained Devices

    In: 27th Asia and South Pacific Design Automation Conference (ASP-DAC). Asia and South Pacific Design Automation Conference (ASP-DAC), January 17-20, 2022.

  3. Niklas Bruns; Vladimir Herdt; Eyck Jentzsch; Rolf Drechsler

    Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided Aging

    In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2022), March 14-23, Antwerpen, Belgium, 2022.

  4. Niklas Bruns; Vladimir Herdt; Eyck Jentzsch; Rolf Drechsler

    RISC-V Processor Verification with Coverage-guided Aging

    In: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV). ITG/GMM/GI-Workshop "Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen" (MBMV-2022), February 17-18, virtual, 2022.

  5. Weiyan Zhang; Mehran Goli; Rolf Drechsler

    Early Performance Estimation of Embedded Software on RISC-V Processor using Linear Regression

    In: 25th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS). IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS-2022), April 6-8, Prague, Czech Republic, 2022.

  6. Milan Funck; Vladimir Herdt; Rolf Drechsler

    Virtual Prototype driven Design, Implementation and Evaluation of RISC-V Instruction Set Extensions

    In: 25th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS). IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS-2022), April 6-8, Prague, Czech Republic, 2022.

  7. Christopher Metz; Mehran Goli; Rolf Drechsler

    ML-based Power Estimation of Convolutional Neural Networks on GPGPUs

    In: 25th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS). IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS-2022), April 6-8, Prague, Czech Republic, 2022.

  8. Kamalika Datta; Abhoy Kole; Indranil Sengupta; Rolf Drechsler

    Nearest Neighbor Mapping of Quantum Circuits to Two-Dimensional Hexagonal Qubit Architecture

    In: IEEE International Symposium on Multiple-Valued Logic. IEEE International Symposium on Multiple-Valued Logic (ISMVL-2022), Dallas, Texas, USA, IEEE, 2022.

  9. Pascal Pieper; Vladimir Herdt; Daniel Große; Rolf Drechsler

    Verifying SystemC TLM Peripherals using Modern C++ Symbolic Execution Tools

    In: 59th Design Automation Conference (DAC). Design Automation Conference (DAC-2022), July 10-14, San Francisco, USA, 2022.

  10. Niklas Bruns; Vladimir Herdt; Daniel Große; Rolf Drechsler

    Efficient Cross-Level Processor Verification using Coverage-guided Fuzzing

    In: Great Lakes Symposium on VLSI (GLSVLSI). ACM Great Lakes Symposium on VLSI (GLSVLSI-2022), June 6-8, Irvine, USA, 2022.