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Publikationen

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  1. Automated Equivalence Checking Method for Majority based In-Memory Computing on ReRAM Crossbars

    In: Proceedings of the 28th Asia and South Pacific Design Automation Conference (ASP-DAC). Asia and South Pacific Design Automation Conference …

  2. Kemal Çağlar Coşkun; Muhammad Hassan; Rolf Drechsler

    Equivalence Checking of System-Level and SPICE-Level Models of Static Nonlinear Circuits

    In: Design, Automation and Test in Europe (DATE). Design, Automation & Test in Europe (DATE-2023), April 17-19, Antwerp, Belgium, 2023.

  3. VAST: Validation of VP-based Heterogeneous Systems against Availability Security Properties using Static Information Flow Tracking

    In: International Symposium on Quality Electronic Design (ISQED'23). International Symposium on Quality Electronic Design (ISQED-2023), April 5-7, San …

  4. Security Validation of VP-based Heterogeneous Systems: A Completeness-driven Perspective

    In: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV). ITG/GMM/GI-Workshop "Methoden und …

  5. System Level Verification of Analog/Mixed-Signal Systems using Metamorphic Relations

    In: 34. GI/GMM/ITG Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ). GI/GMM/ITG Workshop Testmethoden und Zuverlässigkeit von …

  6. Kemal Çağlar Coşkun; Muhammad Hassan; Rolf Drechsler

    Equivalence Checking of System-Level and SPICE-Level Models of Linear Analog Filters

    In: 25th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS). IEEE International Symposium on Design and …

  7. Muhammad Hassan; Thilo Voertler; Karsten Einwich; Rolf Drechsler; Daniel Große

    Towards System-level Assertions for Heterogeneous Systems

    In: 15th International Workshop on Boolean Problems (IWSBP). International Workshop on Boolean Problems (IWSBP-2022), September 22-23, Bremen, …

  8. Muhammad Hassan; Thilo Vörtler; Karsten Einwich; Rolf Drechsler; Daniel Große

    A Cross-domain Heterogeneous ABV-Library for Mixed-signal Virtual Prototypes in SystemC/AMS

    In: Design and Verification Conference in Europe (DVCon Europe). Design and Verification Conference Europe (DVCon Europe-2022), December 6-7, 2022.

  9. System Level verification of Phase-Locked Loop using Metamorphic Relations

    In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2021), February 1-5, virtual, 2021.