veriSIMPLER : An Automated Formal Verification Methodology for SIMPLER MAGIC Design Style Based In-Memory Computing

@article{pub15060,
    author = {

Jha, Chandan
 and 

Qayyum, Khushboo
 and 

Coskun, Kemal Çaglar
 and 

Singh, Simranjeet
 and 

Hassan, Muhammad
 and 

Leupers, Rainer
 and 

Merchant, Farhad
 and 

Drechsler, Rolf
},
    title = {veriSIMPLER : An Automated Formal Verification Methodology for SIMPLER MAGIC Design Style Based In-Memory Computing},
    year = {2024},
    journal = {IEEE Transactions on Circuits and Systems I: Regular Papers},
    publisher = {IEEE}
}