Publication
On Analysis of Applications using MAGIC-based In-Memory Computing
Chandrajit Pal; Lennart Weingarten; Klaus D. McDonald-Maier; Rolf Drechsler; Sangeet Saha; Kamalika Datta
In: IEEE Computer Society Annual Symposium on VLSI (ISVLSI). IEEE Computer Society Annual Symposium on VLSI (ISVLSI-2026), July 7-10, Kolkata, India, 2026.
Abstract
Executing full applications on RRAM memristorcrossbars for in-memory computing (IMC) using the MAGIC
design style is inhibited by the incompatibility between MAGIC’s
combinational requirement and the sequential logic (e.g., flipflops) in standard Register-Transfer Level (RTL) generated
from High-Level Languages (HLLs). This paper introduces
the Application-to-Combinational (A2C) Flow, a novel synthesis
methodology that resolves this by generating purely combinational, structural Verilog RTL directly from HLL code. The
A2C Flow guarantees a single, stateless dataflow function by
eliminating all sequential, behavioural, and iterative constructs
through three key transformations: State Linearisation, Algorithmic Control-Flow Flattening, and Temporal-to-Spatial Unrolling. Thereafter, we validate the approach using an in-memory
synthesis and verification methodology that assesses resource
utilisation and verifies functional correctness against a golden
reference using Boolean Satisfiability (SAT). This successfully
removes sequential elements, bridging the gap to realise complex
application-level kernels on MAGIC-based memristive crossbars.