Fatemeh Shirinzadeh, M.Sc.

Publikationen

1. In-Memory SAT-Solver for Self-Verification of Programmable Memristive Architectures

   Fatemeh Shirinzadeh; Arighna Deb; Saeideh Shirinzadeh; Abhoy Kole; Kamalika Datta; Rolf Drechsler

   In: 37th International Conference on VLSI Design (VLSID). International Conference on VLSI Design (VLSID-2024), Kolkata, India, 1/2024.
2. An Evolutionary Approach to Reconfigurable Scan Network Design

   Payam Habiby; Fatemeh Shirinzadeh; Rolf Drechsler

   In: 36. GI/GMM/ITG Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ). GI/GMM/ITG Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ-2024), February 25-27, Darmstadt, Germany, 2024.
3. A Multi-Objective Evolutionary Approach for Test Network Design

   Payam Habiby; Fatemeh Shirinzadeh; Sebastian Huhn; Rolf Drechsler

   In: IEEE 29th European Test Symposium. IEEE European Test Symposium (ETS-2024), May 20-24, Den Haag, Netherlands, 2024.