Publikationen CPS

In: Connection Science, Vol. 35, No. 1, Page 2194581, Taylor & Francis, 4/2023.

In: Proceedings of the 28th Asia and South Pacific Design Automation Conference (ASP-DAC). Asia and South Pacific Design Automation Conference (ASP-DAC-2023), February 16-19, Tokyo, Japan, 2023.

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In: Proceedings of the 28th Asia and South Pacific Design Automation Conference (ASP-DAC). Asia and South Pacific Design Automation Conference (ASP-DAC), January 16-19, Tokyo, Japan, 2023.

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In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2023), April 17-19, Antwerp, Belgium, 2023.

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In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2023), April 17-19, Antwerp, Belgium, 2023.

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In: Design, Automation and Test in Europe (DATE). Design, Automation & Test in Europe (DATE-2023), April 17-19, Antwerp, Belgium, 2023.

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In: Design, Automation and Test in Europe (DATE). Design, Automation & Test in Europe (DATE-2023), April 17-19, Antwerp, Belgium, 2023.

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In: Design, Automation and Test in Europe (DATE). Design, Automation & Test in Europe (DATE-2023), April 17-19, Antwerp, Belgium, 2023.

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In: Proceedings of the 28th Asia and South Pacific Design Automation Conference (ASP-DAC). Asia and South Pacific Design Automation Conference (ASP-DAC-2023), January 16-19, Tokyo, Japan, 2023.

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In: Amy Eguchi; Nuno Lau; Maike Paetzel-Prüsmann; Thanapat Wanichanon (Hrsg.). RoboCup 2022: Robot World Cup XXV. RoboCup International Symposium (RoboCup-2022), July 17, Bangkok, Thailand, Pages 287-299, Lecture Notes in Artificial Intelligence (LNAI), Vol. 13561, ISBN 978-3-031-28468-7, Springer, 2023.

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Cyber-Physical Systems

PUBLIKATIONEN

Quality medical data management within an open AI architecture – cancer patients case

Automated Equivalence Checking Method for Majority based In-Memory Computing on ReRAM Crossbars

EDDY: A Multi-Core BDD Package With Dynamic Memory Management and Reduced Fragmentation

Polynomial Formal Verification of Floating Point Adders

Processor Verification using Symbolic Execution: A RISC-V Case-Study

Equivalence Checking of System-Level and SPICE-Level Models of Static Nonlinear Circuits

FELOPi: A Framework for Simulation and Evaluation of Post-Layout File Against Optical Probing

Extending the Design Space of Dynamic Quantum Circuits for Toffoli based Network

Trojan-D2: Post-Layout Design and Detection of Stealthy Hardware Trojans - a RISC-V Case Study

B-Human 2022 - More Team Play with Less Communication

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