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  1. Marianna Jantunen; Richard Meyes; Veronika Kurchyna; Tobias Meisen; Pekka Abrahamsson; Rahul Mohanani

    Researchers' Concerns on Artificial Intelligence Ethics: Results from a Scenario-Based Survey

    In: IWSiB '24: Proceedings of the 7th International Workshop on Software-intensive Business. International Workshop on Software-intensive Business …

  2. Alexander Schultheis; Lukas Malburg; Joscha Grüger; Justin Weich; Yannis Bertrand; Ralph Bergmann; Estefanía Serral Asensio

    Identifying Missing Sensor Values in IoT Time Series Data: A Weight-Based Extension of Similarity Measures for Smart Manufacturing

    In: Juan A. Recio-Garcia; Mauricio G. Orozco-del-Castillo; Derek Bridge (Hrsg.). Case-Based Reasoning Research and Development - 32nd International …

  3. Dynamic Realization of Multiple Control Toffoli Gate

    In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2024), March 25 - February 27, Valencia, Spain, …

  4. Complete and Efficient Verification for a RISC-V Processor using Formal Verification

    In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2024), March 25-27, Valencia, Spain, 2024.

  5. In-Memory SAT-Solver for Self-Verification of Programmable Memristive Architectures

    In: 37th International Conference on VLSI Design (VLSID). International Conference on VLSI Design (VLSID-2024), Kolkata, India, 1/2024.

  6. Ankit Bende; Simranjeet Singh; Chandan Jha; Tim Kemper; Felix Cüppers; Christopher Bengel; Andre Zambanini; Dennis Nielinger; Sachin Patkar; Rolf Drechsler; Rainer Waser; Farhad Merchant; Vikas Rana

    Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array

    In: 37 International Conference on VLSI Design (VLSID). International Conference on VLSI Design (VLSID-2024), Kolkata, India, 2024.

  7. Chandan Jha; Sallar Ahmadi-Pour; Rolf Drechsler

    Input Distribution Aware Library of Approximate Adders Based on Memristor-Aided Logic

    In: 37th International Conference on VLSI Design (VLSID). International Conference on VLSI Design (VLSID-2024), Kolkata, India, 2024.

  8. Simranjeet Singh; Chandan Kumar Jha; Vikas Rana Ankit Bende; Sachin Patkar; Rolf Drechsler; Farhad Merchant

    MemSPICE: Automated Simulation and Energy Estimation Framework for MAGIC-Based Logic-in-Memory

    In: 29th Asia and South Pacific Design Automation Conference (ASP-DAC). Asia and South Pacific Design Automation Conference (ASP-DAC-2024), January …

  9. Security Coverage Metrics for Information Flow at the System Level

    In: 29th Asia and South Pacific Design Automation Conference (ASP-DAC). Asia and South Pacific Design Automation Conference (ASP-DAC-2024), January …

  10. Muhammad Hassan; Sallar Ahmadi-Pour; Khushboo Qayyum; Chandan Kumar Jha; Rolf Drechsler

    LLM-guided Formal Verification Coupled with Mutation Testing

    In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2024), March 25-27, Valencia, Spain, 2024.