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Publications

Displaying results 41 to 50 of 11308.
  1. Barno Kaharova; Rico Komenda; Taras Holoyad; Adriano Lucieri; Robin Pekerman; Jackie Ma; Daniel Becker; Fabian Malms; Maximilian Poretschkin; Christopher Braun; Helena Monke; Paul Beyer; Dominik Eisl; Lukas Höhndorf; Nicole Schmidt; Matthias Hackert-Oschätzchen; Philipp Plänitz; Maik Liebl; Hans Rabus; Antoine Gautier; Manoj Kahdan; Simon Geschwill; Timo Felser; Annegrit Seyerlein-Klug; Marc Hauer

    DIN SPEC 92006:2026-02 Künstliche Intelligenz - Anforderungen an KI-Prüfwerkzeuge; Text Englisch

    Deutsches Institut für Normung (DIN), DIN SPEC, Vol. 92006, 2/2026.

  2. Detlef Olschewski; André Bluhm; Joerg Firnkorn; Adriano Lucieri; Sebastian Palacio; Yeji Streppel; Carlos Zednik; Rebekka Görge; Maximilian Poretschkin; Nikolas Becker; Thomas Zielke; Christian Kruschel; Matthias Neumann-Brosig; Stephen Bäuerle; Marton Eifert; Erik Martori López; Felix Assion; Annegrit Seyerlein-Klug; Ute Schmid; Stefan Haufe; Antoine Gautier; Lukas Bieringer; Tarek R. Besold; Armin B. Cremers

    DIN SPEC 92001-3 Artificial Intelligence-Life Cycle Processes and Quality Requirements-Part 3: Explainability

    Deutsches Institut für Normung (DIN), DIN SPEC, Vol. 92001-3, 2023.

  3. FormalHandshake — Open Source Design and Verification Flow for complex Hardware Circuits

    In: Forum on specification & Design Languages (FDL). Forum on Specification & Design Languages (FDL-2026), September 9-11, Rom, Italy, 2026.

  4. Lennart Weingarten; Kamalika Datta; Rolf Drechsler

    Scalable Verification for Dot-Product Architectures using Symbolic Computer Algebra

    In: Forum on specification & Design Languages (FDL). Forum on Specification & Design Languages (FDL), September 9-11, Rom, Italy, 2026.

  5. Jan Kleinekathöfer; Lennart Weingarten; Kamalika Datta; Rolf Drechsler

    Polynomial Formal Verification of Structurally Simple Multipliers

    In: Forum on specification & Design Languages (FDL). Forum on Specification & Design Languages (FDL-2026), September 9-11, Rom, Italy, 2026.

  6. Low T-Depth Clifford+T Decomposition of Large Toffoli Gates using Dynamic Phase Correction

    In: International Conference on Quantum Computing and Engineering (QCE). IEEE International Conference on Quantum Computing and Engineering (QCE-2026), September 13-18, Toronto, Canada, IEEE, 2026.

  7. Sutirtha Bhattacharyya; Chandan Jha; Rolf Drechsler

    Reinforcement Learning Guided Boundary Activity Passing for Incremental Bounded Model Checking

    In: 8th ACM/IEEE International Symposium on Machine Learning for CAD. ACM/IEEE Workshop on Machine Learning for CAD (MLCAD-2026), September 7-9, Seogwipo, Korea, Democratic People's Republic of, 2026.

  8. Karl Aaron Rudkowski; Abhoy Kole; Rolf Drechsler

    Optimizing Run-Time Assertions for Quantum Circuit Debugging: A Depth–Ancilla Tradeoff

    In: 39th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems. IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT-2026), September 30 - October 2, Rom, Italy, IEEE, 2026.

  9. A Design Automation Framework for Approximate MAGIC-Based Dadda Tree Multipliers in Memristive In-Memory Computing

    In: 29th Euromicro Conference Series on Digital System Design (DSD) 2026. Euromicro Conference on Digital System Design (DSD-2026), September 2-4, Krakau, Poland, 2026.